Generally in video cameras, video signal generating apparatus and video measuring instruments, when encodings and decodings for the video signals are to be carried out, only the chrominance subcarrier components are extracted out from the square waves, and two chrominance subcarriers having phases separated by 90 degrees from each other are output. The two chrominance subcarriers are subjected to a balanced modulation to form an I (or R-Y) signal or a Q (B-Y) signal, and are combined together to output them as color signals.
FIG. 1 illustrates a conventional circuit for producing first and second chrominance subcarriers. In this drawing, when square wave signals of 3.58 MHz which are outputted after frequency division by a chrominance subcarrier oscillator are applied to an input terminal IN, only the basic wave components (3.58 MHz sinusoidal wave components) are filtered from the square wave signals during passage through a current restricting resistance R1 and a filtering circuit which uses a coil L1 and a capacitor C1. The basic wave components filtered by the filtering circuit are transferred through a resistance R2 and a coupling capacitor C2 to the base of a transistor Q1.
The resistance R2 is a bleeder resistance, and base bias resistance R3,R4, are connected to the transistor Q1, so that certain basic wave components can be applied to the base of the transistor Q1. The 3.58 MHz sinusoidal waves supplied to the base terminal of the transistor Q1 are amplified to provide an inverse phase through its collector, and also are provided the normal phase through an emitter.
Thus, the amplitude of the output signals are amplified twice, in order to facilitate the operations of a phase shifting circuit for temperature compensation which uses a capacitor C3, resistances R7, R8 and a thermistor T1. The temperature compensating thermistor T1 is connected in parallel with the resistance R7, in such a manner that it should be capable of correcting the phase shifts due to the variations of the transistor Q1 and the capacitor C3 in accordance with the rise or drop of the temperature. That is, if the temperature is varied, then the resistance value of the thermistor T1 is varied, and at the same time, the constants of the phase shifting circuit are varied in accordance with capacitor C3 and the formula R8+R7/T1, so that the phase shifts due to the temperature variations are compensated.
Therefore, the phase-corrected signals are applied into the base terminal of a transistor Q2, and the emitter terminal outputs a 3.58 MHz sinusoidal wave signals assisted by an emitter load resistance R9 through an output terminal OUT1 for a first chrominance subcarrier. Meanwhile, if the first chrominance subcarriers obtained from the emitter terminal of the transistor Q2 are transmitted through a resistance R10 to the base terminal of a transistor Q3, inverted and amplified signals are transmitted through a collector terminal owing to the function of a collector load resistance R11, and non-inverted and amplified signals are provided through an emitter terminal owing to the function of an emitter load resistance R12.
The inverted and amplified signals from the collector terminal of the transistor Q3 are phase-shifted by a capacitor C4 during passage through a phase-shifting variable resistance VR1, and are mixed together with the non-inverted and amplified signals from the emitter terminal of the transistor Q3. Under this condition, the vector sum of the voltage between the two electrodes of the capacitor C4 and the current flowing through the capacitor C4, i.e., the voltage between The two ends of the variable resistance VR1, becomes the voltage Vec between the emitter and the collector of the transistor Q3.
If it is assumed that the voltage Vec between the emitter and the collector is constant, the voltage applied to the variable resistance VR1 and the voltage applied to the capacitor C4 form a phase separation of 90 degrees, and also form a value of the vector sum. Therefore, if the resistance value is increased by adjusting the variable resistance VR1, then the voltage drop between two ends of the variable resistance VR1 becomes larger, while, if the resistance value is decreased, the voltage drop is reduced.
If such phase-shifted signal currents are applied to the base terminal of a transistor Q4, second chrominance subcarriers are obtained from an emitter terminal of the transistor Q4, at an output terminal OUT2. Then the variable resistance VR1 is adjusted in such a manner that the first chrominance subcarriers and the second chrominance subcarriers have a phase separation of 90 degrees.
However, in the circuit operated in the manner described above, a single power source is used, and therefore, in the case where peaking or a ringing occurs at the ascending or descending edges of the square wave signals received, those square wave signals can be distorted during the filtering process, or a correct band-pass filtering can not be carried out depending on the characteristics of the transistor. Further, unless a phase adjustment is carried out for the phase-shifting circuit, the amplitudes of the phase-shifted waves can be varied.